ADC regular sequence register 1 (ADC_SQR1)
Первый регистр назначения регулярных каналов АЦП STM32F10x
Смещение (Address offset): 0x2C
Reset value: 0x0000'0000
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| Reserved | |||||||
| --- | --- | --- | --- | --- | --- | --- | --- |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| L[3:0] | SQ16[4:1] | ||||||
| rw | rw | ||||||
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |||
| SQ16[0] | SQ15[4:0] | SQ14[4:3] | ||||||||
| rw | rw | rw | ||||||||
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SQ14[2:0] | SQ13[4:0] | ||||||
| rw | rw | ||||||
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Биты
Имя
Описание
31:24
Reserved
Must be kept at reset value
Зарезервировано. Должно быть сохранено значение после сброса
23:20
L[3:0]
Regular channel sequence length
Количество преобразований в группе регулярных каналов
0000 : 1 преобразование;
0001 : 2 преобразования;
0010 : 3 преобразования;
...
1111 : 16 преобразований;
19:15
SQ16[4:0]
16th conversion in regular sequence
Назначает 16-му каналу в группе регулярных каналов номер входного канала
Номера входных каналов от 0 до 15 (от ADC_IN0 до ADC_IN15) - внешние входы.
ADC1: ADC_IN16 - датчик температуры, ADC_IN17 - опорное напряжение.
ADC2: ADC_IN16, ADC_IN17 - подключены к Vss ("земля").
ADC3: ADC_IN9, ADC_IN14, ADC_IN15, ADC_IN16, ADC_IN17 - подключены к Vss ("земля").
Назначения остальным каналам производятся аналогично.
//- stm32f10x.h
/******************* Bit definition for ADC_SQR1 register *******************/
#define ADC_SQR1_SQ13 ((uint32_t)0x0000001F) /* SQ13[4:0] bits (13th conversion in regular sequence) */
#define ADC_SQR1_SQ13_0 ((uint32_t)0x00000001) /* Bit 0 */
#define ADC_SQR1_SQ13_1 ((uint32_t)0x00000002) /* Bit 1 */
#define ADC_SQR1_SQ13_2 ((uint32_t)0x00000004) /* Bit 2 */
#define ADC_SQR1_SQ13_3 ((uint32_t)0x00000008) /* Bit 3 */
#define ADC_SQR1_SQ13_4 ((uint32_t)0x00000010) /* Bit 4 */
#define ADC_SQR1_SQ14 ((uint32_t)0x000003E0) /* SQ14[4:0] bits (14th conversion in regular sequence) */
#define ADC_SQR1_SQ14_0 ((uint32_t)0x00000020) /* Bit 0 */
#define ADC_SQR1_SQ14_1 ((uint32_t)0x00000040) /* Bit 1 */
#define ADC_SQR1_SQ14_2 ((uint32_t)0x00000080) /* Bit 2 */
#define ADC_SQR1_SQ14_3 ((uint32_t)0x00000100) /* Bit 3 */
#define ADC_SQR1_SQ14_4 ((uint32_t)0x00000200) /* Bit 4 */
#define ADC_SQR1_SQ15 ((uint32_t)0x00007C00) /* SQ15[4:0] bits (15th conversion in regular sequence) */
#define ADC_SQR1_SQ15_0 ((uint32_t)0x00000400) /* Bit 0 */
#define ADC_SQR1_SQ15_1 ((uint32_t)0x00000800) /* Bit 1 */
#define ADC_SQR1_SQ15_2 ((uint32_t)0x00001000) /* Bit 2 */
#define ADC_SQR1_SQ15_3 ((uint32_t)0x00002000) /* Bit 3 */
#define ADC_SQR1_SQ15_4 ((uint32_t)0x00004000) /* Bit 4 */
#define ADC_SQR1_SQ16 ((uint32_t)0x000F8000) /* SQ16[4:0] bits (16th conversion in regular sequence) */
#define ADC_SQR1_SQ16_0 ((uint32_t)0x00008000) /* Bit 0 */
#define ADC_SQR1_SQ16_1 ((uint32_t)0x00010000) /* Bit 1 */
#define ADC_SQR1_SQ16_2 ((uint32_t)0x00020000) /* Bit 2 */
#define ADC_SQR1_SQ16_3 ((uint32_t)0x00040000) /* Bit 3 */
#define ADC_SQR1_SQ16_4 ((uint32_t)0x00080000) /* Bit 4 */
#define ADC_SQR1_L ((uint32_t)0x00F00000) /* L[3:0] bits (Regular channel sequence length) */
#define ADC_SQR1_L_0 ((uint32_t)0x00100000) /* Bit 0 */
#define ADC_SQR1_L_1 ((uint32_t)0x00200000) /* Bit 1 */
#define ADC_SQR1_L_2 ((uint32_t)0x00400000) /* Bit 2 */
#define ADC_SQR1_L_3 ((uint32_t)0x00800000) /* Bit 3 */